LLVM Instruction Latency Measurement for Software-Hardware Interface for Multi-many-core

Authors

  • Hiro Mikami Nagoya University
  • Kei Torigoe Nagoya University
  • Makoto Inokawa Nagoya University
  • Masato Edahiro Nagoya University

DOI:

https://doi.org/10.24297/ijct.v22i.9231

Keywords:

estimation, multi-many-core, embedded system, SHIM

Abstract

The increasing scale and complexity of embedded systems and the use of multi-many-core processors have resulted in a corresponding increase in the demand for software development with a high degree of parallelism. The degree of parallelism in software and the accuracy of performance estimation in the early design stages of model-based development can be improved by estimating performance of blocks in models and utilizing the estimate for parallelization. Research is therefore being performed on a software performance estimation technique that uses the IEEE2804-2019 hardware feature description called software-hardware interface for multi-many-core (SHIM). In SHIM, each LLVM-IR instruction is associated with the execution cycle of the target processor. Because several types of assembly instruction sequences for the target processor are generated from a given LLVM-IR instruction, it is not easy to estimate the number of execution cycles. In this study, we propose a regression analysis method to estimate the execution cycles for each LLVM-IR instruction. It is observed that our method estimated the execution cycles within the target error of ±20% in experiments using a Raspberry Pi3 Model B+.

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References

EEMBC, "CoreMark", (Accessed 2022-05-01). https://www.eembc.org/coremark/.

EMC, "The Multicore Association Specifications", (Accessed 2022-05-01). https://www.embeddedmulticore.org/themulticore- association-specifications/.

eSOL Co. Ltd., "eMBP (Model Based Parallelizer)", (Accessed 2022-05-01).

https://www.esol.co.jp/embedded/mbp.html.

Gondo, M., Arakawa, F., & Edahiro, M. (2014, April). Establishing a standard interface between multi-manycore

and software tools-SHIM. In 2014 IEEE COOL Chips XVII (pp. 1-3). IEEE.

Hwang, Y., Abdi, S., & Gajski, D. (2008, March). Cycle-approximate retargetable performance estimation at the

transaction level. In Proceedings of the conference on Design, automation and test in Europe (pp. 3-8).

IEEE, "IEEE Standard for Software-Hardware Interface for Multi-Many-Core", IEEE 2804-2019, (Accessed

-05-01). https://standards.ieee.org/ieee/2804/7477/.

LLVM project, "The LLVM Compiler Infrastructure",(Accessed 2022-05-01). https://llvm.org/.

LLVM project, "LLVM Language Reference Manual", (Accessed 2022-05-01). https://llvm.org/docs/LangRef.html.

LLVM project, "llvm-cov", (Accessed 2022-05-01). https://llvm.org/docs/CommandGuide/llvm-cov.html.

Patel, R., & Rajawat, A. (2013). Recent trends in embedded system software performance estimation. Design

Automation for Embedded Systems, 17(1), 193-213.

Ray, A., Srikanthan, T., & Wu, J. (2010). Rapid techniques for performance estimation of processors. Journal of

Research and Practice in Information Technology, 42(2), 147-165.

Renesas electronics, "RH850/E1M-S2", (Accessed 2022-05-01). https://www.renesas.com/jp/en/products/microcontrollersmicroprocessors/ rh850-automotive-mcus.

SHIM Working Group, "SHIM Latency Measurement and Insertion", (Accessed 2022-05-01).

https://github.com/openshim/shim2/tree/master/shim-measure.

Wang, S., Zhong, G., & Mitra, T. (2017). CGPredict: Embedded GPU performance estimation from single-threaded

applications. ACM Transactions on Embedded Computing Systems (TECS), 16(5s), 1-22.

Wijesundera, D., Prakash, A., Srikanthan, T., & Ihalage, A. (2018). Framework for rapid performance estimation

of embedded soft core processors. ACM Transactions on Reconfigurable Technology and Systems (TRETS), 11(2), 1-21.

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Published

2022-05-27

How to Cite

Mikami, H., Torigoe, K., Inokawa, M., & Edahiro, M. (2022). LLVM Instruction Latency Measurement for Software-Hardware Interface for Multi-many-core. INTERNATIONAL JOURNAL OF COMPUTERS &Amp; TECHNOLOGY, 22, 50–63. https://doi.org/10.24297/ijct.v22i.9231

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Section

Research Articles